Synchronous Dynamic Random-Access Memory is a type of Volatile Memory. It is the ancestor of the common DDR, or Double Data-Rate memory technologies found in RAM sticks in modern computers.

Historically, it is an evolution of DRAM, where the synchronous clock allows the memory chip to pipeline operations (i.e. start processing an operation before the previous one completes).

It has a Synchronous Interface, where changes to the input pins are only read on rising clock edges.

The individual memory bits are each stored in a single capacitor, and an additional transistor used to select the cell to read, or write to it. This makes SDRAM exceptionally dense and inexpensive.

Reading an SDRAM cell requires disharching the capacitor into a Sense Amplifier, and re-writing the read value into the cell to preserve it.

If left unattended, the charge decays through the leakage current of the transistor. It must be continuously read and re-written in order to persist information